56 search results - page 9 / 12 » Maximum power estimation for CMOS circuits using determinist... |
ISQED
2007
IEEE
14 years 1 months ago
2007
IEEE
In nanometer regime, the effects of variations are having an increasing impact on the delay and power characteristics of devices as well as the yield of the circuit. Statistical t...
PATMOS
2007
Springer
14 years 1 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...
TCAD
2008
13 years 7 months ago
2008
Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the mos...
ICASSP
2008
IEEE
14 years 1 months ago
2008
IEEE
In a reverberant scenario, phase transformed weighted algorithms are more robust than Maximum Likelihood (ML) because of the insufficiency of the data model to incorporate reverb...
TCAD
2008
13 years 7 months ago
2008
Manufacturing process variations lead to variability in circuit delay and, if not accounted for, can cause excessive timing yield loss. The familiar traditional approaches to timin...