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» Measuring Operating System Overhead on CMT Processors
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ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
14 years 21 days ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...
RTSS
2003
IEEE
14 years 1 months ago
A Dynamic Voltage Scaling Algorithm for Sporadic Tasks
Dynamic voltage scaling (DVS) algorithms save energy by scaling down the processor frequency when the processor is not fully loaded. Many algorithms have been proposed for periodi...
Ala' Qadi, Steve Goddard, Shane Farritor
CONCURRENCY
2006
140views more  CONCURRENCY 2006»
13 years 8 months ago
An efficient memory operations optimization technique for vector loops on Itanium 2 processors
To keep up with a large degree of instruction level parallelism (ILP), the Itanium 2 cache systems use a complex organization scheme: load/store queues, banking and interleaving. ...
William Jalby, Christophe Lemuet, Sid Ahmed Ali To...
STOC
2004
ACM
158views Algorithms» more  STOC 2004»
14 years 8 months ago
Collective asynchronous reading with polylogarithmic worst-case overhead
The Collect problem for an asynchronous shared-memory system has the objective for the processors to learn all values of a collection of shared registers, while minimizing the tot...
Bogdan S. Chlebus, Dariusz R. Kowalski, Alexander ...
SPAA
2009
ACM
14 years 9 months ago
Beyond nested parallelism: tight bounds on work-stealing overheads for parallel futures
Work stealing is a popular method of scheduling fine-grained parallel tasks. The performance of work stealing has been extensively studied, both theoretically and empirically, but...
Daniel Spoonhower, Guy E. Blelloch, Phillip B. Gib...