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DAC
2011
ACM
12 years 9 months ago
Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect
Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to develop mitigation te...
Jim Aarestad, Charles Lamech, Jim Plusquellic, Dhr...
SIGSOFT
2005
ACM
14 years 10 months ago
Dynamically discovering architectures with DiscoTect
One of the challenges for software architects is ensuring that an implemented system faithfully represents its architecture. We describe and demonstrate a tool, called DiscoTect, ...
Bradley R. Schmerl, David Garlan, Hong Yan
PAM
2007
Springer
14 years 3 months ago
Neuro-fuzzy Processing of Packet Dispersion Traces for Highly Variable Cross-Traffic Estimation
Cross-traffic data rate over the tight link of a path can be estimated using different active probing packet dispersion techniques. Many of these techniques send large amounts of p...
Marco A. Alzate, Néstor M. Peña, Mig...
CONCURRENCY
2010
95views more  CONCURRENCY 2010»
13 years 8 months ago
The Scalasca performance toolset architecture
SCALASCA is a performance toolset that has been specifically designed to analyze parallel application execution behavior on large-scale systems. It offers an incremental performan...
Markus Geimer, Felix Wolf, Brian J. N. Wylie, Erik...
ISCA
1996
IEEE
103views Hardware» more  ISCA 1996»
14 years 1 months ago
Evaluation of Design Alternatives for a Multiprocessor Microprocessor
In the future, advanced integrated circuit processing and packaging technology will allow for several design options for multiprocessor microprocessors. In this paper we consider ...
Basem A. Nayfeh, Lance Hammond, Kunle Olukotun