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ICCD
2007
IEEE
215views Hardware» more  ICCD 2007»
16 years 1 months ago
A 4.6Tbits/s 3.6GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS
As chip multiprocessors (CMPs) become the only viable way to scale up and utilize the abundant transistors made available in current microprocessors, the design of on-chip network...
Amit Kumar 0002, Partha Kundu, Arvind P. Singh, Li...
ICCD
2004
IEEE
125views Hardware» more  ICCD 2004»
16 years 1 months ago
IPC Driven Dynamic Associative Cache Architecture for Low Energy
Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...
Sriram Nadathur, Akhilesh Tyagi
125
Voted
ICCD
2000
IEEE
94views Hardware» more  ICCD 2000»
16 years 1 months ago
A Selective Temporal and Aggressive Spatial Cache System Based on Time Interval
This research proposes a new cache system that can increase the effect by temporal and spatial locality by using only simple hardware control without any locality detection hardwa...
Jung-Hoon Lee, Jang-Soo Lee, Shin-Dug Kim
ICCAD
2004
IEEE
118views Hardware» more  ICCAD 2004»
16 years 1 months ago
Optimizing mode transition sequences in idle intervals for component-level and system-level energy minimization
New embedded systems offer rich power management features in the form of multiple operational and non-operational power modes. While they offer mechanisms for better energy effic...
Jinfeng Liu, Pai H. Chou
TLDI
2009
ACM
111views Formal Methods» more  TLDI 2009»
16 years 1 months ago
A generic type-and-effect system
Type-and-effect systems are a natural approach for statically reasoning about a program’s execution. They have been used to track a variety of computational effects, for example...
Daniel Marino, Todd D. Millstein