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CODES
2004
IEEE
14 years 21 days ago
Efficient exploration of on-chip bus architectures and memory allocation
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
Sungchan Kim, Chaeseok Im, Soonhoi Ha
CODES
2004
IEEE
14 years 21 days ago
Benchmark-based design strategies for single chip heterogeneous multiprocessors
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek
COMPSAC
2004
IEEE
14 years 21 days ago
Efficient Partial Multiple Periodic Patterns Mining without Redundant Rules
Partial periodic patterns mining is a very interesting domain in data mining problem. In the previous studies, full and partial multiple periodic patterns mining problems are cons...
Wenpo Yang, Guanling Lee
CASES
2006
ACM
14 years 21 days ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu
CC
2006
Springer
182views System Software» more  CC 2006»
14 years 21 days ago
Selective Runtime Memory Disambiguation in a Dynamic Binary Translator
Abstract. Alias analysis, traditionally performed statically, is unsuited for a dynamic binary translator (DBT) due to incomplete control-flow information and the high complexity o...
Bolei Guo, Youfeng Wu, Cheng Wang, Matthew J. Brid...