71 search results - page 1 / 15 » Memory Access Coalescing: A technique for Eliminating Redund... |
PLDI
1994
ACM
14 years 19 days ago
1994
ACM
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
ISCA
1995
IEEE
14 years 3 days ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...
FAST
2011
13 years 1 days ago
2011
Although Flash Memory based Solid State Drive (SSD) exhibits high performance and low power consumption, a critical concern is its limited lifespan along with the associated relia...
CGO
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper we present the internal representation and optimizations used by the CASH compiler for improving the memory parallelism of pointer-based programs. CASH uses an SSA-b...
CGO
2004
IEEE
14 years 9 days ago
2004
IEEE
Memory profiling is the process of characterizing a program's memory behavior by observing and recording its response to specific input sets. Relevant aspects of the program&...