71 search results - page 8 / 15 » Memory Access Coalescing: A technique for Eliminating Redund... |
CLUSTER
2000
IEEE
14 years 5 days ago
2000
IEEE
This paper presents a new approach towards parallel I/O for message-passing (MPI) applications on clusters built with commodity hardware and an SCI interconnect: instead of using t...
POPL
1999
ACM
14 years 27 days ago
1999
ACM
An increasing number of systems rely on programming language technology to ensure safety and security of low-level code. Unfortunately, these systems typically rely on a complex, ...
HPCA
2008
IEEE
14 years 9 months ago
2008
IEEE
Dynamic binary translation (DBT) is a runtime instrumentation technique commonly used to support profiling, optimization, secure execution, and bug detection tools for application...
PLDI
1999
ACM
14 years 27 days ago
1999
ACM
Load-reuse analysis finds instructions that repeatedly access the same memory location. This location can be promoted to a register, eliminating redundant loads by reusing the re...
IWSOC
2003
IEEE
14 years 1 months ago
2003
IEEE
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...