60 search results - page 9 / 12 » Memory Estimation for High Level Synthesis |
JSA
2007
13 years 7 months ago
2007
Traditional design techniques for embedded systems apply transformations on the source code to optimize hardwarerelated cost factors. Unfortunately, such transformations cannot ad...
CCL
1994
Springer
13 years 11 months ago
1994
Springer
Abstract: This paper describes the application of CLP (constraint logic programming) to several digital circuit design problems. It is shown that logic programming together with ef...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...