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MICRO
2006
IEEE
155views Hardware» more  MICRO 2006»
14 years 4 months ago
In-Network Cache Coherence
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
Noel Eisley, Li-Shiuan Peh, Li Shang
ISCA
2008
IEEE
142views Hardware» more  ISCA 2008»
14 years 4 months ago
Improving NAND Flash Based Disk Caches
Flash is a widely used storage device that provides high density and low power, appealing properties for general purpose computing. Today, its usual application is in portable spe...
Taeho Kgil, David Roberts, Trevor N. Mudge
SFM
2007
Springer
14 years 4 months ago
Tackling Large State Spaces in Performance Modelling
Stochastic performance models provide a powerful way of capturing and analysing the behaviour of complex concurrent systems. Traditionally, performance measures for these models ar...
William J. Knottenbelt, Jeremy T. Bradley
SC
2004
ACM
14 years 3 months ago
A Performance and Scalability Analysis of the BlueGene/L Architecture
This paper is structured as follows. Section 2 gives an architectural description of BlueGene/L. Section 3 analyzes the issue of “computational noise” – the effect that the o...
Kei Davis, Adolfy Hoisie, Greg Johnson, Darren J. ...
SECON
2007
IEEE
14 years 4 months ago
Facilitating an Active Transmit-only RFID System Through Receiver-based Processing
— Many asset tracking applications demand long-lived, low-cost, and continuous monitoring of a large number of items, which has posed a significant challenge to today’s RFID d...
Yu Zhang, Gautam D. Bhanage, Wade Trappe, Yanyong ...