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» Memory Exploration for Low Power, Embedded Systems
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EWSN
2012
Springer
12 years 3 months ago
Low Power or High Performance? A Tradeoff Whose Time Has Come (and Nearly Gone)
Abstract. Some have argued that the dichotomy between high-performance operation and low resource utilization is false – an artifact that will soon succumb to Moore’s Law and c...
JeongGil Ko, Kevin Klues, Christian Richter, Wanja...
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
14 years 8 months ago
Customization of Register File Banking Architecture for Low Power
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
Rakesh Nalluri, Rohan Garg, Preeti Ranjan Panda
ICCAD
2003
IEEE
111views Hardware» more  ICCAD 2003»
14 years 4 months ago
Formal Methods for Dynamic Power Management
Dynamic Power Management or DPM refers to the problem of judicious application of various low power techniques based on runtime conditions in an embedded system to minimize the to...
Rajesh K. Gupta, Sandy Irani, Sandeep K. Shukla
ESTIMEDIA
2006
Springer
13 years 11 months ago
A Low-Power Implementation of 3D Graphics System for Embedded Mobile Systems
Chanmin Park, Hyunhee Kim, Jihong Kim
CGO
2005
IEEE
14 years 1 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...