276 search results - page 18 / 56 » Memory Organization for Improved Data Cache Performance in E... |
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
Vertex texturing is state-of-the-art functionality of vertex. Thus, traditional texture caches used in RE are not the 3D geometry processor. However, it aggravates the always appli...
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
Image processing applications tend to access their data non-sequentially and reuse that data infrequently. As a result, they tend to perform poorly on conventional memory systems ...
IPPS
2003
IEEE
14 years 20 days ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
IJES
2007
13 years 7 months ago
2007
Abstract: Main memory has become one of the largest contributors to overall energy consumption and offers many opportunities for power/energy reduction. In this paper, we propose ...
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...