276 search results - page 25 / 56 » Memory Organization for Improved Data Cache Performance in E... |
ICS
1997
Tsinghua U.
14 years 19 days ago
1997
Tsinghua U.
This paper makes the case for the use of XOR-based placement functions for cache memories. It shows that these XOR-mapping schemes can eliminate many conflict misses for direct-ma...
CASES
2007
ACM
14 years 15 days ago
2007
ACM
Embedded platforms are resource-constrained systems in which performance and memory requirements of executed code are of critical importance. However, standard techniques such as ...
ECRTS
2008
IEEE
14 years 3 months ago
2008
IEEE
Procedure Positioning is a well known compiler optimization aiming at the improvement of the instruction cache behavior. A contiguous mapping of procedures calling each other freq...
RTAS
2010
IEEE
13 years 6 months ago
2010
IEEE
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
ISCA
2010
IEEE
14 years 1 months ago
2010
IEEE
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...