276 search results - page 49 / 56 » Memory Organization for Improved Data Cache Performance in E... |
CF
2009
ACM
14 years 2 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
CASES
2008
ACM
13 years 10 months ago
2008
ACM
While technology advances have made MPSoCs a standard architecture for embedded systems, their applicability is increasingly being challenged by dramatic increases in the amount o...
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
Chip multiprocessors (CMPs) substantially increase capacity pressure on the on-chip memory hierarchy while requiring fast access. Neither private nor shared caches can provide bot...
ISPASS
2007
IEEE
14 years 2 months ago
2007
IEEE
Recent research advocates address-correlating predictors to identify cache block addresses for prefetch. Unfortunately, address-correlating predictors require correlation data sto...
CASES
2007
ACM
13 years 10 months ago
2007
ACM
Aggressive compiler optimizations such as software pipelining and loop invariant code motion can significantly improve application performance, but these transformations often re...