276 search results - page 8 / 56 » Memory Organization for Improved Data Cache Performance in E... |
DATE
2002
IEEE
14 years 10 days ago
2002
IEEE
In this paper, we suggest hardware-assisted data compression as a tool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture ...
MTA
2006
13 years 7 months ago
2006
Abstract There are increasing demands on portable communication devices to run multimedia applications. ISO (an International Organization for Standardization) standard MPEG-4 is a...
JEC
2006
13 years 7 months ago
2006
Chip multi-processors (CMP) are rapidly emerging as an important design paradigm for both high performance and embedded processors. These machines provide an important performance...
HIPEAC
2011
Springer
12 years 7 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
CASES
2001
ACM
13 years 11 months ago
2001
ACM
In an embedded system, it is common to have several memory areas with different properties, such as access time and size. An access to a specific memory area is usually restricted...