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IPPS
1997
IEEE
14 years 17 days ago
DPF: A Data Parallel Fortran Benchmark Suite
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...
Y. Charlie Hu, S. Lennart Johnsson, Dimitris Kehag...
MICRO
1997
IEEE
79views Hardware» more  MICRO 1997»
14 years 17 days ago
On High-Bandwidth Data Cache Design for Multi-Issue Processors
Highly aggressive multi-issue processor designs of the past few years and projections for the next decade require that we redesign the operation of the cache memory system. The nu...
Jude A. Rivers, Gary S. Tyson, Edward S. Davidson,...
ICS
1993
Tsinghua U.
14 years 13 days ago
Anatomy of a Message in the Alewife Multiprocessor
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...
John Kubiatowicz, Anant Agarwal
ASPLOS
1992
ACM
14 years 13 days ago
Design and Evaluation of a Compiler Algorithm for Prefetching
Software-controlled data prefetching is a promising technique for improving the performance of the memory subsystem to match today's high-performance processors. While prefet...
Todd C. Mowry, Monica S. Lam, Anoop Gupta
ISSS
2000
IEEE
127views Hardware» more  ISSS 2000»
13 years 12 months ago
Low Power Storage Cycle Budget Distribution Tool Support for Hierarchical Graphs
In data dominated applications, like multi-media and telecom applications, data storage and transfers are the most important factors in terms of energy consumption, area and syste...
Erik Brockmeyer, Arnout Vandecappelle, Sven Wuytac...