Sciweavers

3202 search results - page 508 / 641
» Memory access scheduling
Sort
View
LCTRTS
2007
Springer
14 years 2 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
14 years 2 months ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft
TCC
2007
Springer
104views Cryptology» more  TCC 2007»
14 years 2 months ago
Unifying Classical and Quantum Key Distillation
Assume that two distant parties, Alice and Bob, as well as an adversary, Eve, have access to (quantum) systems prepared jointly according to a tripartite state ρABE. In addition, ...
Matthias Christandl, Artur Ekert, Michal Horodecki...
FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
14 years 2 months ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
HPDC
2006
IEEE
14 years 2 months ago
Path Grammar Guided Trace Compression and Trace Approximation
Trace-driven simulation is an important technique used in the evaluation of computer architecture innovations. However using it for studying parallel computers and applications is...
Xiaofeng Gao, Allan Snavely, Larry Carter