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DAC
2006
ACM
14 years 8 months ago
Leakage power reduction of embedded memories on FPGAs through location assignment
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
Yan Meng, Timothy Sherwood, Ryan Kastner
HIPEAC
2009
Springer
13 years 11 months ago
Deriving Efficient Data Movement from Decoupled Access/Execute Specifications
Abstract. On multi-core architectures with software-managed memories, effectively orchestrating data movement is essential to performance, but is tedious and error-prone. In this p...
Lee W. Howes, Anton Lokhmotov, Alastair F. Donalds...
IEEEPACT
1998
IEEE
13 years 12 months ago
Athapascan-1: On-Line Building Data Flow Graph in a Parallel Language
In order to achieve practical efficient execution on a parallel architecture, a knowledge of the data dependencies related to the application appears as the key point for building...
François Galilée, Jean-Louis Roch, G...
CHI
2004
ACM
14 years 8 months ago
Use of mobile appointment scheduling devices
One hundred thirty-eight subjects participated in a study on mobile appointment scheduling. Subjects completed a questionnaire on their primary method of managing appointments whe...
Thad Starner, Cornelis M. Snoeck, Benjamin A. Wong...
CASES
2001
ACM
13 years 11 months ago
Combined partitioning and data padding for scheduling multiple loop nests
With the widening performance gap between processors and main memory, efficient memory accessing behavior is necessary for good program performance. Loop partition is an effective...
Zhong Wang, Edwin Hsing-Mean Sha, Xiaobo Hu