110 search results - page 8 / 22 » Memory hierarchy exploration for low power architectures in ... |
ISSS
2000
IEEE
13 years 11 months ago
2000
IEEE
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption i...
CAMP
2005
IEEE
13 years 8 months ago
2005
IEEE
— We have simulated the implementation of 16-bit floating point instructions on a Pentium4 and PowerPC G4 and G5 to evaluate the performance impact of these instructions in embed...
DATE
2002
IEEE
13 years 11 months ago
2002
IEEE
The market demand for portable multimedia applications has exploded in the recent years. Unfortunately, for such applications current compilers and software optimization methods o...
TPDS
2008
13 years 6 months ago
2008
Multicore architectures have been ruling the recent microprocessor design trend. This is due to different reasons: better performance, thread-level parallelism bounds in modern app...
ISCA
1997
IEEE
13 years 10 months ago
1997
IEEE
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...