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IPPS
2006
IEEE
14 years 1 months ago
Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications
The novel design of an efficient FPGA interconnection architecture with multiple Switch Boxes (SB) and hardwired connections for realizing data intensive applications (i.e. DSP ap...
Kostas Siozios, Konstantinos Tatas, Dimitrios Soud...
MICRO
1996
IEEE
97views Hardware» more  MICRO 1996»
13 years 12 months ago
Modulo Scheduling of Loops in Control-intensive Non-numeric Programs
Much of the previous work on modulo scheduling has targeted numeric programs, in which, often, the majority of the loops are well-behaved loop-counter-based loops without early ex...
Daniel M. Lavery, Wen-mei W. Hwu
COMSWARE
2007
IEEE
13 years 11 months ago
QoS-driven middleware for optimum provisioning of location based services
This paper proposes a middleware to reduce the and consistency are usually poor since they depend on cell consumption of network resources and optimize the provision of size; GPS t...
Israel Martín-Escalona, Francisco Barcel&oa...
GECCO
2006
Springer
198views Optimization» more  GECCO 2006»
13 years 11 months ago
Reward allotment in an event-driven hybrid learning classifier system for online soccer games
This paper describes our study into the concept of using rewards in a classifier system applied to the acquisition of decision-making algorithms for agents in a soccer game. Our a...
Yuji Sato, Yosuke Akatsuka, Takenori Nishizono
ICDE
2008
IEEE
148views Database» more  ICDE 2008»
14 years 2 months ago
Automated physical design in database caches
Abstract— Performance of proxy caches for database federations that serve a large number of users is crucially dependent on its physical design. Current techniques, automated or ...
Tanu Malik, Xiaodan Wang, Randal C. Burns, Debabra...