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» Merging Parallel Simulation Programs
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PPOPP
2006
ACM
14 years 2 months ago
POSH: a TLS compiler that exploits program structure
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better understood, it is important to focus on TLS compilation. TLS compilers are interesting in that,...
Wei Liu, James Tuck, Luis Ceze, Wonsun Ahn, Karin ...
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 5 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
ASPLOS
2012
ACM
12 years 4 months ago
Chameleon: operating system support for dynamic processors
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
Sankaralingam Panneerselvam, Michael M. Swift
IPPS
1997
IEEE
14 years 1 months ago
A Customizable Simulator for Workstation Networks
We present a customizable simulator called netsim for high-performance point-to-point workstation networks that is accurate enough to be used for application-level performance ana...
Mustafa Uysal, Anurag Acharya, Robert Bennett, Joe...
HPCN
1994
Springer
14 years 27 days ago
Three-Dimensional Simulation of Semiconductor Devices
The exact knowledge of the heat flow in heterojunction bipolar transistors (HBT) during power operation is an important key factor for the systematic improvement of power density,...
Wilfried Klix, Ralf Dittmann, Roland Stenzel