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CHES
2007
Springer
154views Cryptology» more  CHES 2007»
14 years 4 months ago
Multi-gigabit GCM-AES Architecture Optimized for FPGAs
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...
Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert ...
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
14 years 3 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
IWSOC
2005
IEEE
133views Hardware» more  IWSOC 2005»
14 years 3 months ago
Design Mapping, and Simulations of a 3G WCDMA/FDD Basestation Using Network on Chip
This paper presents a case study of a single-chip 3G WCDMA/FDD basestation implementation based on a circuit-switched network on chip. As the amount of transistors on a chip conti...
Daniel Wiklund, Dake Liu
ADHOCNOW
2005
Springer
14 years 3 months ago
Probability Distributions for Channel Utilisation
Sensor nets have many undisputed fields of application. A paradigm of communication is the use of one control channel in the MAC layer. We challenge this paradigm for nodes with v...
Christian Schindelhauer, Kerstin Voß
LADC
2005
Springer
14 years 3 months ago
Timed Asynchronous Distributed Systems
We present a framework for building fail-safe hard real-time applications in timed asynchronous distributed systems subject to communication partitions and performance, omission, ...
Christof Fetzer