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FPL
2006
Springer
96views Hardware» more  FPL 2006»
14 years 1 months ago
High Speed Document Clustering in Reconfigurable Hardware
High-performance document clustering systems enable similar documents to automatically self-organize into groups. In the past, the large amount of computational time needed to clu...
G. Adam Covington, Charles L. G. Comstock, Andrew ...
WOA
2000
13 years 11 months ago
Towards Interoperable Mechanized Reasoning Systems: the Logic Broker Architecture
There is a growing interest in the integration of mechanized reasoning systems such as automated theorem provers, computer algebra systems, and model checkers. State-of-the-art re...
Alessandro Armando, Daniele Zini
IPPS
2007
IEEE
14 years 4 months ago
Experimental Evaluation of Emerging Multi-core Architectures
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...
Abdullah Kayi, Yiyi Yao, Tarek A. El-Ghazawi, Greg...
DAC
2011
ACM
12 years 10 months ago
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection
In the era of deep sub-wavelength lithography for nanometer VLSI designs, manufacturability and yield issues are critical and need to be addressed during the key physical design i...
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan
ICCAD
2006
IEEE
152views Hardware» more  ICCAD 2006»
14 years 7 months ago
Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
Zhuo Feng, Peng Li