A number of industry trends are shaping the requirements for IC and electronic equipment design. The density and complexity of circuit technologies have increased to a point where...
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Inter-wire coupling is a major source of power consumption and delay faults for on-chip buses implemented in UDSM SoC Systems. Elimination or minimization of such faults is crucia...
This paper quantifies the performance of typical functional unit interface designs in single-chip systems. We introduce a specific equation to guide the design of optimal module i...
Power-aware systems are those that must make the best use of available power. They subsume traditional low-power systems in that they must not only minimize power when the budget ...
Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh, Fadi ...