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IPPS
2007
IEEE
14 years 4 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
14 years 3 months ago
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
Embedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs pro...
Abhishek Mitra, Marcello Lajolo, Kanishka Lahiri
DAC
2007
ACM
14 years 11 months ago
Shared Resource Access Attributes for High-Level Contention Models
Emerging single-chip heterogeneous multiprocessors feature hundreds of design elements contending for shared resources, making it difficult to isolate performance impacts of indiv...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
TSE
2008
131views more  TSE 2008»
13 years 9 months ago
Enhancing an Application Server to Support Available Components
Three-tier middleware architecture is commonly used for hosting enterprise-distributed applications. Typically, the application is decomposed into three layers: front end, middle t...
Achmad I. Kistijantoro, Graham Morgan, Santosh K. ...
APCSAC
2003
IEEE
14 years 3 months ago
Mapping Applications to a Coarse Grain Reconfigurable System
This paper introduces a method which can be used to map applications written in a high level source language program, like C, to a coarse grain reconfigurable architecture, MONTIU...
Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Mi...