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» Migration in Single Chip Multiprocessors
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ISCA
2007
IEEE
161views Hardware» more  ISCA 2007»
14 years 1 months ago
Physical simulation for animation and visual effects: parallelization and characterization for chip multiprocessors
We explore the emerging application area of physics-based simulation for computer animation and visual special effects. In particular, we examine its parallelization potential and...
Christopher J. Hughes, Radek Grzeszczuk, Eftychios...
ICS
2007
Tsinghua U.
14 years 1 months ago
Cooperative cache partitioning for chip multiprocessors
This paper presents Cooperative Cache Partitioning (CCP) to allocate cache resources among threads concurrently running on CMPs. Unlike cache partitioning schemes that use a singl...
Jichuan Chang, Gurindar S. Sohi
EMSOFT
2005
Springer
14 years 1 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir
HPCA
2011
IEEE
12 years 11 months ago
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tu...
TJS
2010
145views more  TJS 2010»
13 years 2 months ago
Analyzing and enhancing the parallel sort operation on multithreaded architectures
The Sort operation is a core part of many critical applications. Despite the large efforts to parallelize it, the fact that it suffers from high data-dependencies vastly limits it...
Layali K. Rashid, Wessam Hassanein, Moustafa A. Ha...