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CCGRID
2001
IEEE
14 years 2 months ago
An Efficient Lock Protocol for Home-Based Lazy Release Consistency
Home-based Lazy Release Consistency (HLRC) shows poor performance on lock based applications because of two reasons: (1) a whole page is fetched on a page fault while actual modif...
Hee-Chul Yun, Sang-Kwon Lee, Joonwon Lee, Seungryo...
IISWC
2009
IEEE
14 years 5 months ago
A communication characterisation of Splash-2 and Parsec
Recent benchmark suite releases such as Parsec specifically utilise the tightly coupled cores available in chipmultiprocessors to allow the use of newer, high performance, models ...
Nick Barrow-Williams, Christian Fensch, Simon Moor...
ICPP
1999
IEEE
14 years 3 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
ISCA
1998
IEEE
119views Hardware» more  ISCA 1998»
14 years 3 months ago
Using Prediction to Accelerate Coherence Protocols
Most large shared-memory multiprocessors use directory protocols to keep per-processor caches coherent. Some memory references in such systems, however, suffer long latencies for ...
Shubhendu S. Mukherjee, Mark D. Hill
HPCA
1996
IEEE
14 years 3 months ago
A Comparison of Entry Consistency and Lazy Release Consistency Implementations
This paper compares several implementations of entry consistency (EC) and lazy release consistency (LRC), two relaxed memory models in use with software distributed shared memory ...
Sarita V. Adve, Alan L. Cox, Sandhya Dwarkadas, Ra...