2314 search results - page 452 / 463 » Minimal Partitions of a Graph |
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
ADHOCNOW
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. Robots coordinate among themselves to select one of them to respond to an event reported to one of robots. The goal is to minimize the communication cost of selecting bes...
ESA
2009
Springer
14 years 1 months ago
2009
Springer
Dial-a-Ride problems consist of a set V of n vertices in a metric space (denoting travel time between vertices) and a set of m objects represented as source-destination pairs {(si,...
CODES
2008
IEEE
14 years 1 months ago
2008
IEEE
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...