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116
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GLVLSI
2007
IEEE
167views VLSI» more  GLVLSI 2007»
15 years 10 months ago
A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
Dariusz Kania
142
Voted
IPPS
2007
IEEE
15 years 10 months ago
An Implementation of Page Allocation Shaping for Energy Efficiency
Main memory in many tera-scale systems requires tens of kilowatts of power. The resulting energy consumption increases system cost and the heat produced reduces reliability. Emerg...
Matthew E. Tolentino, Joseph Turner, Kirk W. Camer...
129
Voted
CVPR
2006
IEEE
15 years 9 months ago
Fast Variational Segmentation using Partial Extremal Initialization
In this paper we consider region-based variational segmentation of two- and three-dimensional images by the minimization of functionals whose fidelity term is the quotient of two...
Jan Erik Solem, Niels Chr. Overgaard, Markus Perss...
147
Voted
IEEEARES
2006
IEEE
15 years 9 months ago
Evaluation of Network Robustness for Given Defense Resource Allocation Strategies
Since the 9/11 terrorist attacks, the effective and efficient protection of critical information infrastructures has become an even more important issue. To enhance network surviv...
Y.-S. Lin, P.-H. Tsang, C.-H. Chen, C.-L. Tseng, Y...
112
Voted
ISCAS
2006
IEEE
106views Hardware» more  ISCAS 2006»
15 years 9 months ago
Integrating observability don't cares in all-solution SAT solvers
— All-solution Boolean satisfiability (SAT) solvers are engines employed to find all the possible solutions to a SAT problem. Their applications are found throughout the EDA in...
Sean Safarpour, Andreas G. Veneris, Rolf Drechsler