588 search results - page 44 / 118 » Minimality Results for the Spatial Logics |
FPGA
2001
ACM
14 years 1 months ago
2001
ACM
Conventional technology mapping algorithms for SRAM-based Field Programmable Gate Arrays (FPGAs) are normally carried out on a fixed logic decomposition of a circuit. The impact o...
TCAD
1998
13 years 8 months ago
1998
—Conventional scan design imposes considerable area and delay overheads. To establish a scan chain in the test mode, multiplexers at the inputs of flip-flops and scan wires are...
DFT
2002
IEEE
14 years 1 months ago
2002
IEEE
Many digital circuits have constraints on the logic values a set of signal lines can have. In this paper, we present two new techniques for detecting the illegal combinations of l...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
Reversible logic has applications in quantum computing, low power CMOS, nanotechnology, optical computing, and DNA computing. The most common reversible gates are the Toffoli gate...