24 search results - page 1 / 5 » Minimization of the reconfiguration latency for the mapping ... |
CODES
2009
IEEE
13 years 10 months ago
2009
IEEE
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
FPL
2004
Springer
14 years 5 days ago
2004
Springer
A high-performance reconfigurable coarse-grain data-path, part of a hybrid reconfigurable platform, is introduced. The data-path consists of coarse grain components that their flex...
DAC
2003
ACM
14 years 7 months ago
2003
ACM
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
IPPS
2006
IEEE
14 years 24 days ago
2006
IEEE
Communication latencies constitute a significant factor in the performance of parallel applications. With techniques such as wormhole routing, the variation in no-load latencies ...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...