137 search results - page 11 / 28 » Minimizing power across multiple technology and design level... |
DAC
1996
ACM
13 years 11 months ago
1996
ACM
A novel methodology for circuit design and automatic layout generation is proposed for a class of mixed-signal circuits in presence of layout parasitics and substrate induced nois...
CSE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Today’s wirelessly networked embedded systems underlie a vast array of electronic devices, performing computation, communication, and input/output. A major design goal...
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
This paper proposes a framework for (signal) interconnect power optimization at the global routing stage. In a typical design flow, the primary objective of global routing is mini...
ISI
2004
Springer
14 years 25 days ago
2004
Springer
The protection of critical infrastructures, such as electrical power grids, has become a primary concern of many nation states in recent years. Critical infrastructures involve mul...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...