137 search results - page 16 / 28 » Minimizing power across multiple technology and design level... |
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
Analysis of technology and application trends reveals a growing imbalance in the peak compute-to-memory-capacity ratio for future servers. At the same time, the fraction contribut...
VLSID
2006
IEEE
14 years 1 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
ICIDS
2009
Springer
14 years 2 months ago
2009
Springer
We suggest harvesting the power of multiplayer design to bridge content across different media platforms and develop player-driven cross-media experiences. This paper first argues ...
HIPC
2007
Springer
14 years 1 months ago
2007
Springer
- With the increased complexity of platforms coupled with data centers’ servers sprawl, power consumption is reaching unsustainable limits. Memory is an important target for plat...
SLIP
2009
ACM
14 years 2 months ago
2009
ACM
Different interconnection structures have been proposed to solve the performance limitation caused by scaling of on-chip global wires. In this paper, we give an overview of curre...