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» Minimizing the Impact of Scan Compression
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VTS
2007
IEEE
85views Hardware» more  VTS 2007»
14 years 5 months ago
Minimizing the Impact of Scan Compression
Peter Wohl, John A. Waicukauski, Rohit Kapur, S. R...
DATE
2009
IEEE
94views Hardware» more  DATE 2009»
14 years 5 months ago
Improving compressed test pattern generation for multiple scan chain failure diagnosis
To reduce test data volumes, encoded tests and compacted test responses are widely used in industry. Use of test response compaction negatively impacts fault diagnosis since the e...
Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. ...
ICCAD
2007
IEEE
135views Hardware» more  ICCAD 2007»
14 years 7 months ago
A selective pattern-compression scheme for power and test-data reduction
— This paper proposes a selective pattern-compression scheme to minimize both test power and test data volume during scan-based testing. The proposed scheme will selectively supp...
Chia-Yi Lin, Hung-Ming Chen
VTS
2002
IEEE
138views Hardware» more  VTS 2002»
14 years 3 months ago
Test Power Reduction through Minimization of Scan Chain Transitions
Parallel test application helps reduce the otherwise considerable test times in SOCs; yet its applicability is limited by average and peak power considerations. The typical test v...
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailog...
DATE
2009
IEEE
88views Hardware» more  DATE 2009»
14 years 2 months ago
A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment
Growing test data volume and overtesting caused by excessive scan capture power are two of the major concerns for the industry when testing large integrated circuits. Various test...
Xiao Liu, Qiang Xu