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» Missing the Memory Wall: The Case for Processor Memory Integ...
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HPCA
2011
IEEE
12 years 11 months ago
MOPED: Orchestrating interprocess message data on CMPs
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
Junli Gu, Steven S. Lumetta, Rakesh Kumar, Yihe Su...
DAC
2006
ACM
14 years 8 months ago
High-level power management of embedded systems with application-specific energy cost functions
Most existing dynamic voltage scaling (DVS) schemes for multiple tasks assume an energy cost function (energy consumption versus execution time) that is independent of the task ch...
Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti...
ASPLOS
2009
ACM
14 years 8 months ago
Dynamic prediction of collection yield for managed runtimes
The growth in complexity of modern systems makes it increasingly difficult to extract high-performance. The software stacks for such systems typically consist of multiple layers a...
Michal Wegiel, Chandra Krintz
KBSE
2005
IEEE
14 years 1 months ago
Locating faulty code using failure-inducing chops
Software debugging is the process of locating and correcting faulty code. Prior techniques to locate faulty code either use program analysis techniques such as backward dynamic pr...
Neelam Gupta, Haifeng He, Xiangyu Zhang, Rajiv Gup...
SAMOS
2004
Springer
14 years 24 days ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...