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HPCA
2000
IEEE
14 years 1 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
IEEEPACT
2000
IEEE
14 years 1 months ago
On Some Implementation Issues for Value Prediction on Wide-Issue ILP Processors
In this paper, we look at two issues which could affect the performance of value prediction on wide-issue ILP processors. One is the large number of accesses to the value predicti...
Sang Jeong Lee, Pen-Chung Yew
HIPC
1999
Springer
14 years 1 months ago
Process Migration Effects on Memory Performance of Multiprocessor
Abstract. In this work we put into evidence how the memory performance of a WebServer machine may depend on the sharing induced by process migration. We considered a shared-bus sha...
Pierfrancesco Foglia, Roberto Giorgi, Cosimo Anton...
ICS
1998
Tsinghua U.
14 years 1 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
ICPP
1994
IEEE
14 years 1 months ago
Cachier: A Tool for Automatically Inserting CICO Annotations
Shared memory in a parallel computer provides prowith the valuable abstraction of a shared address space--through which any part of a computation can access any datum. Although un...
Trishul M. Chilimbi, James R. Larus