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DSN
2007
IEEE
14 years 5 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
DAC
2008
ACM
14 years 12 months ago
Temperature management in multiprocessor SoCs using online learning
In deep submicron circuits, thermal hot spots and high temperature gradients increase the cooling costs, and degrade reliability and performance. In this paper, we propose a low-co...
Ayse Kivilcim Coskun, Tajana Simunic Rosing, Kenny...
ISCA
2011
IEEE
270views Hardware» more  ISCA 2011»
13 years 2 months ago
Sampling + DMR: practical and low-overhead permanent fault detection
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
Shuou Nomura, Matthew D. Sinclair, Chen-Han Ho, Ve...
MICRO
2011
IEEE
193views Hardware» more  MICRO 2011»
13 years 2 months ago
Voltage Noise in Production Processors
Abstract—Parameter variations have become a dominant challenge in microprocessor design. Voltage variation is especially daunting because it happens so rapidly. We measure and ch...
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Si...
EUROSYS
2011
ACM
13 years 2 months ago
Finding complex concurrency bugs in large multi-threaded applications
Parallel software is increasingly necessary to take advantage of multi-core architectures, but it is also prone to concurrency bugs which are particularly hard to avoid, find, an...
Pedro Fonseca, Cheng Li, Rodrigo Rodrigues