446 search results - page 65 / 90 » Modal Logics for Timed Control |
RTSS
2005
IEEE
14 years 2 months ago
2005
IEEE
The periodic resource model for hierarchical, compositional scheduling abstracts task groups by resource requirements. We study this model in the presence of dataflow constraints...
CORR
2011
Springer
13 years 4 months ago
2011
Springer
We introduce streaming tree transducers as an analyzable and expressive model for transforming hierarchically structured data in a single pass. Given a linear encoding of the inpu...
FPL
2007
Springer
14 years 3 months ago
2007
Springer
This paper presents a novel architecture for domain-specific FPGA devices. This architecture can be optimised for both speed and density by exploiting domain-specific informatio...
DAGM
2003
Springer
14 years 2 months ago
2003
Springer
We introduce a computational model of sensor fusion based on the topographic representations of a ”two-microphone and one camera” configuration. Our aim is to perform a robust...
DAC
2008
ACM
14 years 10 months ago
2008
ACM
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...