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FM
2009
Springer
163views Formal Methods» more  FM 2009»
14 years 1 months ago
Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks
We study a clock synchronization protocol for the Chess WSN. First, we model the protocol as a network of timed automata and verify various instances using the Uppaal model checker...
Faranak Heidarian, Julien Schmaltz, Frits W. Vaand...
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
14 years 3 months ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...
ASIACRYPT
2000
Springer
14 years 1 months ago
Increasing the Power of the Dealer in Non-interactive Zero-Knowledge Proof Systems
Abstract. We introduce weaker models for non-interactive zero knowledge, in which the dealer is not restricted to deal a truly random string and may also have access to the input t...
Danny Gutfreund, Michael Ben-Or
CSFW
1998
IEEE
14 years 28 days ago
Proving Security Protocols with Model Checkers by Data Independence Techniques
Model checkers such as FDR have been extremely e ective in checking for, and nding, attacks on cryptographic protocols { see, for example 11, 12, 14] and many of the papers in 3]....
A. W. Roscoe
DAC
2000
ACM
14 years 9 months ago
Hardware implementation of communication protocols modeled by concurrent EFSMs with multi-way synchronization
In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of mult...
Hisaaki Katagiri, Keiichi Yasumoto, Akira Kitajima...