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» Model Classifications and Automated Verification
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DAC
2006
ACM
14 years 8 months ago
Transistor abstraction for the functional verification of FPGAs
or Abstraction for the Functional Verification of FPGAs Guy Dupenloup, Thierry Lemeunier, Roland Mayr Altera Corporation 101 Innovation Drive San Jose, CA 95134 1-408-544-8672 {gdu...
Guy Dupenloup, Thierry Lemeunier, Roland Mayr
JSS
2006
99views more  JSS 2006»
13 years 7 months ago
Automatic generation of assumptions for modular verification of software specifications
Model checking is a powerful automated technique mainly used for the verification of properties of reactive systems. In practice, model checkers are limited due to the state explos...
Claudio de la Riva, Javier Tuya
KBSE
1998
IEEE
14 years 1 days ago
Planning Equational Verification in CCS
Most efforts to automate formal verification of communicating systems have centred around finite-state systems (FSSs). However, FSSs are incapable of modelling many practical comm...
Raul Monroy, Alan Bundy, Ian Green
CAV
1998
Springer
86views Hardware» more  CAV 1998»
14 years 23 hour ago
Formal Verification of Out-of-Order Execution Using Incremental Flushing
We present a two-part approach for verifying out-of-order execution. First, the complexity of out-of-order issue and scheduling is handled by creating der abstraction of the out-of...
Jens U. Skakkebæk, Robert B. Jones, David L....
ACSD
2001
IEEE
74views Hardware» more  ACSD 2001»
13 years 11 months ago
From Code to Models
One of the corner stones of formal methods is the notion traction enables analysis. By the construction of act model we can trade implementation detail for analytical power. The i...
Gerard J. Holzmann