In this paper, we propose a new algorithm for proving the validity or invalidity of a pre/postcondition pair for a program. The algorithm is motivated by the success of the algori...
An approach to system verification is described in which design artefacts produced during forward engineering are automatically compared to corresponding artefacts produced during...
David J. A. Cooper, Benjamin Khoo, Brian R. von Ko...
We describe the verification of the IM: a large, complex (12,000 gates and 1100 latches) circuit that detects and marks the boundaries between Intel architecture (IA-32) instructi...
Mark Aagaard, Robert B. Jones, Carl-Johan H. Seger
-- This paper presents an efficient method for the timing verification of concurrent systems, modeled as labeled Timed Petri nets. The verification problems we consider require us ...
Abstract. Compositional reasoning aims to improve scalability of verification tools by reducing the original verification task into subproblems. The simplification is typically bas...