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» Model building using bi-level optimization
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ICCAD
2005
IEEE
176views Hardware» more  ICCAD 2005»
14 years 4 months ago
Statistical gate sizing for timing yield optimization
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
Debjit Sinha, Narendra V. Shenoy, Hai Zhou
ISCAS
2006
IEEE
101views Hardware» more  ISCAS 2006»
14 years 1 months ago
Neuromimetic ICs and system for parameters extraction in biological neuron models
—This paper presents an analog neuromimetic integrated circuit and an associated system dedicated for experiments of parameters extraction in biological neuron models. The IC bas...
Sylvain Saïghi, Yannick Bornat, Jean Tomas, S...
AIPS
2007
13 years 10 months ago
Monitoring Plan Optimality During Execution
A great deal of research has addressed the problem of generating optimal plans, but these plans are of limited use in circumstances where noisy sensors, unanticipated exogenous ac...
Christian Fritz, Sheila A. McIlraith
ICASSP
2010
IEEE
13 years 8 months ago
Large margin estimation of n-gram language models for speech recognition via linear programming
We present a novel discriminative training algorithm for n-gram language models for use in large vocabulary continuous speech recognition. The algorithm uses large margin estimati...
Vladimir Magdin, Hui Jiang
AUSAI
2009
Springer
13 years 11 months ago
Classification-Assisted Memetic Algorithms for Equality-Constrained Optimization Problems
Regressions has successfully been incorporated into memetic algorithm (MA) to build surrogate models for the objective or constraint landscape of optimization problems. This helps ...
Stephanus Daniel Handoko, Chee Keong Kwoh, Yew-Soo...