288 search results - page 31 / 58 » Model checking SystemC designs using timed automata |
DATE
2006
IEEE
14 years 25 days ago
2006
IEEE
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
ECRTS
2000
IEEE
13 years 11 months ago
2000
IEEE
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
SDL
2007
13 years 8 months ago
2007
Abstract. OpenComRTOS is one of the few Real-Time Operating Systems (RTOS) for embedded systems that was developed using formal modeling techniques. The goal was to obtain a proven...
FDL
2007
IEEE
13 years 10 months ago
2007
IEEE
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...
CASES
2006
ACM
13 years 10 months ago
2006
ACM
Many embedded systems exhibit temporally and behaviorally disjoint behavior slices. When such behaviors are captured by state machines, the current design flow will capture it as ...