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» Model checking transactional memories
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ISQED
2010
IEEE
126views Hardware» more  ISQED 2010»
13 years 9 months ago
Modeling and verification of industrial flash memories
We present a method to abstract, formalize, and verify industrial flash memory implementations. Flash memories contain specialized transistors, e.g., floating gate and split gate d...
Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronal...
SBACPAD
2007
IEEE
143views Hardware» more  SBACPAD 2007»
14 years 1 months ago
A Code Compression Method to Cope with Security Hardware Overheads
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
Eduardo Wanderley Netto, Romain Vaslin, Guy Gognia...
ACMICEC
2007
ACM
127views ECommerce» more  ACMICEC 2007»
13 years 11 months ago
Symbolic model checking of institutions
Norms defined by institutions and enforced by organizations have been put forward as a mechanism to increase the efficiency and reliability of electronic transactions carried out ...
Francesco Viganò, Marco Colombetti
DAC
2008
ACM
14 years 8 months ago
Construction of concrete verification models from C++
C++ based verification methodologies are now emerging as the preferred method for SOC design. However most of the verification involving the C++ models are simulation based. The c...
Malay Haldar, Gagandeep Singh, Saurabh Prabhakar, ...
POPL
2008
ACM
14 years 7 months ago
High-level small-step operational semantics for transactions
Software transactions have received significant attention as a way to simplify shared-memory concurrent programming, but insufficient focus has been given to the precise meaning o...
Katherine F. Moore, Dan Grossman