364 search results - page 12 / 73 » Model checking with Boolean Satisfiability |
ASPDAC
2008
ACM
13 years 8 months ago
2008
ACM
—In this paper we describe a practical methodology to formally verify highly optimized, industrial multipliers. We a multiplier description language which abstracts from low-leve...
SAT
2007
Springer
14 years 1 months ago
2007
Springer
Unmanned aerial vehicles (UAVs) represent an important class of networked robotic applications that must be both highly dependable and autonomous. This paper addresses sensor deplo...
CONCUR
2001
Springer
13 years 12 months ago
2001
Springer
Bounded model checking has been recently introduced as an efficient verification method for reactive systems. In this work we apply bounded model checking to asynchronous systems....
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
: Binary Decision Diagrams (BDDs) have been widely used in synthesis and verification. Boolean Satisfiability (SAT) Solvers, on the other hand, have been gaining
ISQED
2002
IEEE
14 years 12 days ago
2002
IEEE
State-of-the-art verification tools are based on efficient operations on Boolean formulas. Traditional manipulation techniques are based on Binary Decision Diagrams (BDDs) and SAT...