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» Model checking with Boolean Satisfiability
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WLP
2004
Springer
14 years 24 days ago
Solving Alternating Boolean Equation Systems in Answer Set Programming
Abstract. In this paper we apply answer set programming to solve alternating Boolean equation systems. We develop a novel characterization of solutions for variables in disjunctive...
Misa Keinänen, Ilkka Niemelä
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 4 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
ACSD
2003
IEEE
105views Hardware» more  ACSD 2003»
13 years 11 months ago
Detecting State Coding Conflicts in STG Unfoldings Using SAT
Abstract. The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
DAC
2002
ACM
14 years 8 months ago
Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver
We propose Satisfiability Checking (SAT) techniques that lead to a consistent performance improvement of up to 3x over state-ofthe-art SAT solvers like Chaff on important problem ...
Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao ...
CAV
2009
Springer
182views Hardware» more  CAV 2009»
14 years 2 months ago
Generalizing DPLL to Richer Logics
The DPLL approach to the Boolean satisfiability problem (SAT) is a combination of search for a satisfying assignment and logical deduction, in which each process guides the other....
Kenneth L. McMillan, Andreas Kuehlmann, Mooly Sagi...