— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
—Despite the well-known fact that sensing patterns in reality are highly irregular, researchers continue to develop protocols with simplifying assumptions about the sensing. For ...
This paper describes a modeling and simulation framework called VisualSense for wireless sensor networks that builds on and leverages Ptolemy II. This framework supports actor-ori...
Philip Baldwin, Sanjeev Kohli, Edward A. Lee, Xiao...
The paper describes an experimental web-based environment for teaching and testing. The application named Nautilus has been developed using Virtual Reality Modeling Language (VRML...