28 search results - page 4 / 6 » Modeled and Measured Instruction Fetching Performance for Su... |
CF
2010
ACM
14 years 4 days ago
2010
ACM
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...
SIGMETRICS
2003
ACM
14 years 9 days ago
2003
ACM
The increasing constraints on power consumption in many computing systems point to the need for power modeling and estimation for all components of a system. The Operating System ...
ISLPED
2003
ACM
14 years 9 days ago
2003
ACM
The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wideissue, highly speculative cores. Microarchitectural speculation...
CJ
2006
13 years 7 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
ICCD
1997
IEEE
13 years 10 months ago
1997
IEEE
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...