Sciweavers

2379 search results - page 455 / 476
» Modeling, scheduling, and simulation of switched processing ...
Sort
View
IISWC
2009
IEEE
14 years 2 months ago
On the (dis)similarity of transactional memory workloads
— Programming to exploit the resources in a multicore system remains a major obstacle for both computer and software engineers. Transactional memory offers an attractive alternat...
Clay Hughes, James Poe, Amer Qouneh, Tao Li
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
14 years 17 days ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
AFRIGRAPH
2010
ACM
13 years 11 months ago
Visualization of solution sets from automated docking of molecular structures
Aligning structures, often referred to as docking or registration, is frequently required in fields such as computer science, robotics and structural biology. The task of alignin...
Johannes Jansen van Vuuren, Michelle Kuttel, James...
HYBRID
2005
Springer
14 years 1 months ago
Mode-Automata Based Methodology for Scade
In this paper, we present a new design methodology for synchronous reactive systems, based on a clear separation between control and data flow parts. This methodology allows to fa...
Ouassila Labbani, Jean-Luc Dekeyser, Pierre Boulet
CASES
2004
ACM
14 years 1 months ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder