Sciweavers

871 search results - page 142 / 175
» Modeling Architectural Patterns' Behavior Using Architectura...
Sort
View
ICS
2007
Tsinghua U.
14 years 1 months ago
Optimization of data prefetch helper threads with path-expression based statistical modeling
This paper investigates helper threads that improve performance by prefetching data on behalf of an application’s main thread. The focus is data prefetch helper threads that lac...
Tor M. Aamodt, Paul Chow
HPCA
2005
IEEE
14 years 8 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
MOBIHOC
2008
ACM
14 years 7 months ago
On the need for bidirectional coupling of road traffic microsimulation and network simulation
Simulation of network protocol behavior in Vehicular Ad Hoc Network (VANET) scenarios is strongly demanded for evaluating the applicability of developed network protocols. In this...
Christoph Sommer, Zheng Yao, Reinhard German, Falk...
CAISE
2004
Springer
14 years 1 months ago
Object-Process Methodology (OPM) vs. UML - a Code Generation Perspective
Modeling languages have been evolving at a high pace, encouraging the use of automatic code generators for transforming models to programs. Automatic code generators should enable ...
Iris Reinhartz-Berger, Dov Dori
HPCA
2008
IEEE
14 years 8 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...