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IISWC
2008
IEEE
14 years 2 months ago
A workload for evaluating deep packet inspection architectures
—High-speed content inspection of network traffic is an important new application area for programmable networking systems, and has recently led to several proposals for high-per...
Michela Becchi, Mark A. Franklin, Patrick Crowley
ENTCS
2008
122views more  ENTCS 2008»
13 years 8 months ago
Concurrency in Biological Modeling: Behavior, Execution and Visualization
Modeling natural systems is a complicated task that involves the concurrent behavior of various processes, mechanisms and objects. Here, we describe an approach that we have been ...
David Harel, Yaki Setty, Sol Efroni, Naamah Swerdl...
CRIWG
2004
13 years 9 months ago
A Decoupled Architecture for Action-Oriented Coordination and Awareness Management in CSCL/W Frameworks
This paper introduces AORTA, a software architecture that provides object-level coordination and shared workspace awareness support to synchronous and distributed collaborative app...
Pablo Orozco, Juan I. Asensio-Pérez, Pedro ...
VLSID
2006
IEEE
129views VLSI» more  VLSID 2006»
14 years 8 months ago
Modeling and Reduction of Gate Leakage during Behavioral Synthesis of NanoCMOS Circuits
For a nanoCMOS of sub-65nm technology, where the gate oxide (SiO2) thickness is very low, the gate leakage is one of the major components of power dissipation. In this paper, we pr...
Saraju P. Mohanty, Elias Kougianos
DAC
1997
ACM
14 years 4 days ago
A Parallel/Serial Trade-Off Methodology for Look-Up Table Based Decoders
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
Claus Schneider